Specification:

Hardware:

1.Adopt open source design scheme, PcB redraw, sink gold plate design, increase power supplystability and improve signal Sl.

2. The power supply decoupling capacitor adopts tantalum capacitor to reduce power ripple.

3.Reserved CPLD part of the signal test point.

4.Board speed measurement can be stable above 48Mbps.

5.4 Road LED.

Software:

1. Default burning open source USB grab package firmware.

2. Can provide CPLD simple routine code, such as dimming, can do FPGA entry learning to use.

Feature:

1. USB2.0/1.1 bus protocol debugging capture packet.

2. Introduction to CPLD/FPGA learning and development.

Package Included:

1 x Open Source Portable USB Sniffer